Short Bio: Hossein Sayadi is a Tenure-Track Assistant Professor in the Department of Computer Engineering and Computer Science (CECS) at California State University, Long Beach (CSULB). Hossein obtained his Ph.D. degree in Electrical and Computer Engineering from George Mason University (GMU), Fairfax, VA where he conducted his doctoral research on machine learning-based solutions for secure and energy-efficient computer systems. He received his M.Sc. degree in Computer Engineering with emphasis on Computer Architecture from Sharif University of Technology (SUT), Tehran, Iran where he worked on fault tolerant computer design and reliability improvement of on-chip memories in embedded systems. He also obtained his B.Sc. degree in Computer Engineering (Computer Hardware) from K. N. Toosi University of Technology (KNTU) , Tehran, Iran.
Hossein's research interests mainly lie in several areas of computer engineering and computer science including computer systems cybersecurity, hardware security, applied machine learning, computer architecture, and energy-efficient computing. Hossein is the director of Intelligent, Secure, and Energy-Efficient Computer Systems (ISEC) Lab, in the Department of Computer Engineering and Computer Science of the California State University, Long Beach. Hossein is a two-time recipient of the Provost Doctoral Fellowship from George Mason University. His research has resulted in numerous peer-reviewed technical papers in prestigious conferences and journals on the subject. Furthermore, Hossein is serving as a Guest Editor of MDPI Journal of Cryptography and a technical committee member of several international conferences including ACM Great Lakes Symposium on VLSI (GLSVLSI), Int'l. Symposium on Quality Electronic Design (ISQED), Silicon Valley Cybersecurity Conference (SVCC), and Int'l. Green and Sustainable Computing Conference (IGSC).
[33]- [ICCD]: H. Wang, H. Sayadi, A. Sasan, S. Rafatirad, and H. Homayoun, “Phased-Guard: Multi-Phase Machine Learning Framework for Detection and Identification of Zero-Day Microarchitectural Side-Channel Attacks", in Proceedings of 38th IEEE International Conference on Computer Design (ICCD'20), 2020.
[32]- [ICCAD]: H. Wang, H. Sayadi, A. Sasan, S. Rafatirad, and H. Homayoun, “Hybrid-Shield: Accurate and Efficient Cross-Layer Countermeasure for Run-Time Detection and Mitigation of Cache-Based Side-Channel Attacks", in Proceedings of 39th IEEE/ACM International Conference On Computer Aided Design (ICCAD'20), 2020.
[31]- [ICMLA]: H. Wang, H. Sayadi, A. Sasan, S. Rafatirad, and H. Homayoun, “HybriDG: Hybrid Dynamic Time Warping and Gaussian Distribution Model for Detecting Emerging Zero-day Microarchitectural Side-Channel Attacks", in Proceedings of 19th IEEE International Conference on Machine Learning and Applications (ICMLA'20), 2020.
[30]- [IEEE Access]: S. Manoj P D, X. Guo, H. Sayadi, C. Nowzari, A. Sasan, S. Rafatirad, L. Zhao, and H. Homayoun, “Cognitive and Scalable Technique for Securing IoT Networks Against Malware Epidemics", in IEEE Access Journal, 2020.
[29]- [MWSCAS]: H. Sayadi, H. Wang, T. Miari, H. Makrani, M. Aliasgari, S. Rafatirad, H. Homayoun, “Recent Advancements in Microarchitectural Security: Review of Machine Learning Countermeasures", in Proceedings of 63rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS'20), 2020.
[28]- [GLSVLSI]: H. Sayadi, Y Gao, H. Makrani, T. Mohsenin, A. Sasan, S. Rafatirad, J. Lin, H. Homayoun, “StealthMiner: Specialized Time Series Machine Learning for Run-Time Stealthy Malware Detection based on Microarchitectural Features", in Proceedings of 2020 Great Lakes Symposium on VLSI (GLSVLSI'20), 2020.
[27]- [GLSVLSI]: H. Wang, H. Sayadi, A. Sasan, S. Rafatirad, and H. Homayoun, “Comprehensive Evaluation of Machine Learning Countermeasures for Detecting Microarchitectural Side-Channel Attacks", in Proceedings of 2020 Great Lakes Symposium on VLSI (GLSVLSI'20), 2020.
[26]- [IOLTS]: H. Wang, H. Sayadi, A. Sasan, S. Rafatirad, and H. Homayoun, “SCARF: Detecting Side-Channel Attacks at Real-time using Low-level Hardware Features", in Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS'20), 2020.
[25]- [DATE]: H. Wang, H. Sayadi, T. Mohsenin, A. Sasan, S. Rafatirad, and H. Homayoun, “Mitigating Cache-Based Side-Channel Attacks through Randomization: A Comprehensive System and Architecture Level Analysis", in Proceedings of the IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE'20), Grenoble, France, 2020.
[24]- [GOMACTech]: H. Sayadi, Y. Gao, H. Makrani, A. Sasan, J. Lin, S. Rafatirad, and H. Homayoun, “Towards Run-Time Hardware-Assisted Stealthy Malware Detection” , in 45th Government Microcircuit Applications and Critical Technology Conference (GOMACTech’20), March 2020.
[23]- [GOMACTech]: H. Wang, H. Sayadi, A. Sasan, S. Rafatirad, and H. Homayoun, “DREAL: Detecting Side-Channel Attacks at Real-time using Low-level Hardware Features” , in 45th Government Microcircuit Applications and Critical Technology Conference (GOMACTech’20), March 2020.
[22]- [GOMACTech]: H. Makrani, R. Hassan, Hossein Sayadi, S. Manoj P D, S. Rafatirad, and H. Homayoun, “Adversarial Machine Learning in Cloud” , in 45th Government Microcircuit Applications and Critical Technology Conference (GOMACTech’20), March 2020.
[21]- [DATE]: H. Sayadi, H. M. Makrani, S. Manoj P D, T. Mohsenin, A. Sasan, S. Rafatirad and H. Homayoun,
"2SMaRT: A Two-Stage Machine Learning-Based Approach for Run-Time Specialized Hardware-Assisted Malware Detection" , in Design, Automation & Test in Europe (DATE'19), Florence, Italy, 2019.
[20]- [DATE]: S. Manoj P D, H. Sayadi, H. M. Makrani, C. Nowzari, S. Rafatirad, and H. Homayoun, “Lightweight Node-level Malware Detection and Network-level Malware Confinement in IoT Networks” , in Design, Automation & Test in Europe (DATE'19), Florence, Italy, 2019.
[19]- [DAC]: S. Manoj P D, S. Amberkar, S. Bhat, H. Sayadi, S. Rafatirad, and H. Homayoun, “Adversarial Attack on Microarchitectural Based Malware Detectors”, in Proceedings of the 56th ACM/IEEE Design Automation Conference (DAC’19), Las Vegas, Nevada, 2019.
[18]- [DAC]: H. Sayadi, Y. Gao, S. Rafatirad, J. Lin, and H. Homayoun, “CHASE: A Customized Time Series Machine Learning Approach for Hardware-Based Stealthy Malware Detection”, in (Work-in-Progress Sessions) 56th ACM/IEEE Design Automation Conference (DAC’19), Las Vegas, Nevada, 2019.
[17]- [FPL]: H. M. Makrani, F. Farahmand, H. Sayadi, S. Bondi, S. Manoj PD, L. Zhao, A. Sasan, H. Homayoun, and S. Rafatirad, "Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design" , in Proceedings of the International Conference on Field-Programmable Logic & Applications (FPL'19), Barcelona, Spain, 2019.
[16]- [GOMACTech]: M. Taram, D. M. Tullsen, A. Venkat, Hossein Sayadi, H. Wang, S. Manoj P D, and H. Homayoun, “Fast and Efficient Deployment of Security Defenses via Context Sensitive Decoding”, in Proceedings of the 44th Government Microcircuit Applications and Critical Technology Conference (GOMACTech’19), March 2019.
[15]- [ASP-DAC]: H. Makrani, H. Sayadi, S. Bondi, T. Mohsenin, S. Rafatirad, A. Sasan, H. Homayoun, “XPPE: Cross-Platform Performance Estimation of Hardware Accelerators Using Machine Learning”, in Proceedings of the 24th IEEE/ACM 24th Asia and South Pacific Design Automation Conference (ASP-DAC'19), Tokyo, Japan, 2019.
[14]- [DAC]: H. Sayadi, N. Patel, S. Manoj P D, S. Rafatirad, and H. Homayoun, “Ensemble Learning for Effective Run-Time Hardware-Based Malware Detection: A Comprehensive Analysis and Classification” , in Proceedings of 55th ACM/IEEE Design Automation Conference (DAC’18), San Francisco, California, 2018.
[13]- [ASP-DAC]: H. Sayadi, D. Pathak, I. Savidis, and H. Homayoun, “Power Conversion Efficiency-Aware Mapping of Multithreaded Applications on Heterogeneous Architectures: A Comprehensive Parameter Tuning” , in Proceedings of 23rd IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC’18), pp. 70-75, South Korea, Jan. 22-25, 2018.
[12]- [CASES]: F. Brasser, L. Davi, A. Dhavlle, T. Frassetto, S. Manoj, S. Rafatirad, A. Sadeghi, A. Sasan, H. Sayadi, S. Zeitouni, and H. Homayoun, “Advances and Throwbacks in Hardware-Assisted Security” , in Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES’18), Italy, 2018.
[11]- [SoCC]: H. M. Makrani, H. Sayadi, D. Motwani, H. Wang, S. Rafatirad, and H. Homayoun, “Energy-aware and Machine Learning-based Resource Provisioning of In-Memory Analytics on Cloud” , in Proceedings of the ACM Symposium on Cloud Computing (SoCC'18), California, 2018.
[10]- [IEEE-TrustCom]: H. Sayadi, H. Makrani, S. Manoj P D, S. Rafatirad, and H. Homayoun, “Customized Machine Learning-Based Hardware-Assisted Malware Detection in Embedded Devices” , in Proceedings of the IEEE International Conference On Trust, Security And Privacy In Computing And Communications (IEEE TrustCom'18), New York, 2018.
[9]- [MEMSYS]: H. Makrani, H. Sayadi, S. Manoj P D, S. Rafatirad, and H. Homayoun, “A Comprehensive Memory Analysis of Data Intensive Workloads on Server Class Architecture”, in Proceedings of the ACM International Symposium on Memory Systems (MEMSYS'18), Washington DC, 2018.
[8]- [ASAP]: H. Makrani, H. Sayadi, S. Manoj P D, S. Rafatirad, and H. Homayoun, “Compressive Sensing on Storage Data: An Effective Solution to Alleviate I/O Bottleneck in Data-Intensive Workloads”, in Proceedings of the 29th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'18), Italy, 2018.
[7]- [CF]: H. Sayadi, S. Manoj P D, S. Rafatirad, and H. Homayoun, “Comprehensive Assessment of Run-Time Hardware-Supported Malware Detection Using General and Ensemble Learning”, in Proceedings of ACM International Conference on Computing Frontiers (CF’18), Ischia, Italy, May 2018.
[6]- [Arxiv]: H. Sayadi, and H. Homayoun, “Energy-Efficiency Prediction of Multithreaded Workloads on Heterogeneous Composite Cores Architectures using Machine Learning Techniques”, in arXiv preprint arXiv:1808.01728.
[5]- [ICCD]: H. Sayadi, N. Patel, A. Sasan, and H. Homayoun, “Machine Learning-Based Approaches for Energy-Efficiency Prediction and Scheduling in Composite Cores Architectures” , in Proceedings of 35th IEEE International Conference on Computer Design (ICCD’17), pp. 129-136, Boston, MA, November 5-8, 2017. (Runner-up for Best Paper Award)
[4]- [IBM-ET]: H. Sayadi, and H. Homayoun, “Comprehensive Analysis of Hardware-Based Malware Detectors”, in IBM/IEEE CAS EDS Emerging Technology Symposium (IBM-ET'17), Thomas J. Watson Research Centre, Yorktown Heights, New York, October 2017.
[3]- [IGSC]: H. Sayadi, and H. Homayoun, “Scheduling Multithreaded Applications onto Heterogeneous Composite Cores Architectures”, in Proceedings of IEEE International Green and Sustainable Computing Conference (IGSC'17), Orlando, Florida, October 23-25, 2017.
[2]- [DAC]: H. Sayadi, A. Sasan, and H. Homayoun, “Characterization and Scheduling of Multithreaded Applications on Composite Cores Architectures”, in (WIP Sessions) 54th ACM/IEEE Design Automation Conference (DAC’17), Austin, Texas, June 2017.
[1]- [DFT]: H. Sayadi, H. Farbeh, A. M. Monazzah, and S. Gh. Miremadi, “A Data Recomputation Approach for Reliability Improvement of Scratchpad Memory in Embedded Systems” , in Proceedings of 27th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology System (DFT'14), pp. 228-233, Amsterdam, Netherlands, October 1-3, 2014.
Dr. Sayadi's research interests mainly lie in several areas of computer engineering and computer science including computer systems cybersecurity, applied machine learning, computer architecture, and energy-efficient computing. In particular, his current research focuses on hardware & architecture security, run-time malware detection, processor architecture side-channel attacks analysis, adversarial machine learning, and scheduling and resource management in heterogeneous multicore architectures. His doctoral dissertation was focused on developing effective and complexity-aware machine learning-based solutions for predicting the behavior of emerging applications to enhance the security and energy-efficiency of modern computer systems in various applications including high-performance computing, embedded systems, and Internet-of-Things. In addition, during his doctoral studies, he has been involved in the research projects funded by the Defense Advanced Research Projects Agency (DARPA) and the National Science Foundation (NSF).
Dr. Sayadi is the founder and director of Intelligent, Secure, and Energy-Efficient Computer Systems (ISEC) Lab, in the Department of Computer Engineering and Computer Science of the California State University, Long Beach where he expands his research activities and advises graduate and undergraduate students in conducting state-of-the-art research, relevant to Intelligent, Secure, Energy-Efficient Computer Architecture Design. The group pursues experimental cutting-edge research in the areas of hardware security and trust, computer architecture, computer systems cybersecurity, applied machine learning for security and energy-efficient computing, and efficient mapping and scheduling applications into heterogeneous architectures. To this aim, Dr. Sayadi at the ISEC Lab has formed strong collaborative bonds with other engineering and science disciplines undertaking multi-disciplinary research projects.Electrical and Computer Engineering
Dissertation: Machine Learning-based Solutions for Secure and Energy-Efficient Computer Systems
Advisor: Prof. Houman Homayoun
Computer Engineering-Computer Architecture
Dissertation: A Recomputation-based Approach for Error Correction of Scratchpad Memory in Embedded Systems
Advisor: Prof. Seyed Ghassem Miremadi
Computer Engineering-Computer Hardware